At Google Cloud Next on April 22, Sundar Pichai unveiled the eighth-generation TPU — not one chip, but two: the TPU 8t and the TPU 8i.
Splitting a single product generation into two distinct chips is a decision worth examining in itself.
TPU 8t: Built for training
The "t" in TPU 8t stands for training. Key specifications:
| Metric | TPU 8t |
|---|---|
| Maximum chips per pod | 9,600 |
| Shared high-bandwidth memory | 2 PB (per superpod) |
| Performance/price vs. previous gen | +2.7x |
| Native floating-point precision | Supports bf4 (4-bit floating point) |
| Performance/power vs. previous gen | +2x |
It includes a built-in SparseCore accelerator designed for memory-access irregular workloads like embeddings. The network topology uses a 3D torus.
Google's goal is to compress frontier model training cycles from "months" to "weeks."
TPU 8i: Built for inference
The "i" in TPU 8i stands for inference. Key specifications:
| Metric | TPU 8i |
|---|---|
| Maximum chips per pod | 1,152 |
| SRAM vs. previous gen | 3x |
| All-to-all communication hops | Reduced by 50% |
| Performance/price vs. previous gen (low-latency scenarios) | +80% |
It uses a proprietary Boardfly ICI network topology and includes a Collectives Acceleration Engine designed to accelerate autoregressive decoding — a key bottleneck for large model inference.
Why split into two?
The previous generation, Ironwood, handled both training and inference on a single chip.
Google's current assessment is that in the agent era, inference looks fundamentally different from training.
Training is: large batches, one-shot, throughput-first.
Inference (especially for agents) is: continuous operation, low latency, running millions of agents concurrently.
A single architecture optimized for both inevitably compromises hardware efficiency. So Google decided to split them, optimizing each to its maximum potential.
This is a bet on the future shape of AI computing — not just a "faster chip" announcement.
Is Nvidia worried?
Google didn't take direct aim at Nvidia — and on the same day announced it would offer Nvidia's Vera Rubin chips to Cloud customers later in 2026.
That's pragmatic. Enterprise workloads are heavily dependent on the CUDA ecosystem, and migration costs are high — not something that happens overnight. Google's custom chips and Nvidia's will coexist in the same cloud; it's not an "either-or" choice.
But the direction is clear: each TPU generation pushes performance-per-dollar up by an order of magnitude, giving customers one more reason to choose the pure Google route.
For context: 75% of new code at Google is now AI-generated (up from 50% last fall). What does that code run on? Their own chips. The loop is slowly accelerating.
Sources: CocoLoop, Google Cloud launches two new AI chips to compete with Nvidia (TechCrunch); Two new TPUs to power the next wave of AI training and inference at Google (SiliconANGLE); Our eighth generation TPUs: two chips for the agentic era (Google Blog); Sundar Pichai shares news from Google Cloud Next 2026 (Google Blog)